Rational Clocking

نویسندگان

  • Luis F. G. Sarmenta
  • Gill A. Pratt
  • Stephen A. Ward
چکیده

Communication between independently-clocked digital subsystems typically involves a nite probability of synchronization failure whose minimization introduces delays and consequent performance costs. This paper explores a technique that eliminates both the inherent unreliability of such communication and the performance overhead it implies. Our approach maintains a known phase relationship between clocks whose frequencies are related by a rational factor, and exploits the predictability of their relative phases to algorithmi-cally time communications without run-time arbitration contests.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Numerical investigation of clocking in a two-stage gas turbine

Flow in the first two-stage of V 94.2 gas turbine is simulated numerically. In this turbine, the second stator is clocked relative to the first stator to different positions. Steady-state analysis was carried out by varying the circumferential relative position of the consecutive stator vanes to study the effects of the clocking on turbine performance. A density based compressible inviscid ...

متن کامل

A Novel Clocking Strategy for Dynamic Circuits

This paper proposes a new clocking strategy for dynamic circuit. It provides faster performance and smaller area than conventional clocking scheme. The proposed clocking scheme for dynamic circuits provides the solution of the problem caused by logic polarity and clock skew problem simultaneously. To demonstrate the proposed clocking strategy, a 32 bit Carry Look Ahead adder (CLA) is designed a...

متن کامل

AutoFocus Stream Processing for Single-Clocking and Multi-Clocking Semantics

We formalize the AutoFocus Semantics (a time-synchronous subset of the Focus formalism) as stream processing functions on finite and infinite message streams represented as finite/infinite lists. The formalization comprises both the conventional single-clocking semantics (uniform global clock for all components and communications channels) and its extension to multi-clocking semantics (internal...

متن کامل

Low power on-chip clocking for nanomagnetic logic circuits

It is demonstrated that it is possible to switch the magnetisation of nanomagnets by employing the exchange interaction between magnets. This can implement on-chip clocking for nanomagnetic logic circuits by using a current-carrying copper wire circularly wrapped by ferromagnetic cladding. This scheme is potentially more energy efficient than yoked cladding clocking using an external magnetic f...

متن کامل

Design and Analysis of Register Element for Low Power Clocking System

The register element (flip-flop) is a basic building block to design any clocking system, which consists of the clock distribution tree and flip-flops. A large portion of the on chip power is consumed by the clocking system the total power consumption of the clocking system depends on both clocking distribution tree and also the register elements (flip-flops). The power consumption of register ...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 1995